Book Chapters

  1. Jeffrey Goeders, Graham M. Holland, Lesley Shannon, and Steven J.E. Wilton, “Systems-on-Chip on FPGAs,” FPGAs for Software Programmers, 2016.

  2. Andrew Canis, Jongsok Choi, Blair Fort, Bain Syrowik, Ruo Long Lian, Yu Ting Chen, Hsuan Hsiao, Jeffrey Goeders, Stephen Brown, and Jason Anderson, “LegUp high-level synthesis,” FPGAs for Software Programmers, 2016.

Peer-Reviewed Journal Articles

  1. Benjamin James, Michael Wirthlin, and Jeffrey Goeders, “Investigating How Software Characteristics Impact the Effectiveness of Automated Software Fault Tolerance,” IEEE Transactions on Nuclear Science (TNS), Apr 2021.

  2. Al-Shahna Jamal, Eli Cahill, Jeffrey Goeders, and Steven JE Wilton, “Fast Turnaround HLS Debugging using Dependency Analysis and Debug Overlays,” ACM Transactions on Reconfigurable Technology and Systems (TRETS), Feb 2020.

  3. Benjamin James, Heather Quinn, Michael Wirthlin, and Jeffrey Goeders, “Applying Compiler-Automated Software Fault Tolerance to Multiple Processor Platforms,” IEEE Transactions on Nuclear Science (TNS), Jan 2020.

  4. Matthew Bohman, Benjamin James, Michael Wirthlin, Heather Quinn, and Jeffrey Goeders, “Microcontroller Compiler-Assisted Software Fault Tolerance,” IEEE Transactions on Nuclear Science (TNS), Jan 2019.

  5. Jeffrey Goeders, and Steven J.E. Wilton, “Signal-Tracing Techniques for In-System FPGA Debugging of High-Level Synthesis Circuits,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Jan 2017.

  6. Jeffrey Goeders and Steven J.E. Wilton, “Power Aware Architecture Exploration for Field Programmable Gate Arrays,” Journal of Low Power Electronics (JOLPE), Sep. 2014.

  7. Jason Luu, Jeffrey Goeders, Michael Wainberg, Andrew Somerville, Thien Yu, Konstantin Nasartschuk, Miad Nasr, Sen Wang, Tim Liu, Nooruddin Ahmed, Kenneth B Kent, Jason Anderson, Jonathan Rose, and Vaughn Betz, “VTR 7.0: Next Generation Architecture and CAD System for FPGAs,” ACM Transactions on Reconfigurable Technology and Systems (TRETS), Jul 2014.

Peer-Reviewed International Conference Publications

  1. Benjamin James, and Jeffrey Goeders, “Automated Software Compiler Techniques to Provide Fault Tolerance for Real-Time Operating Systems,” Design, Automation and Test in Europe Conference (DATE), Feb 2021.

  2. Tanner Gaskin, Hayden Cook, Wesley Stirk, Robert Lucas, Jeffrey Goeders, and Brad Hutchings, “Using Novel Configuration Techniques for Accelerated FPGA Aging,” International Conference on Field-Programmable Logic and Applications (FPL), Aug 2020.

  3. Matthew Ashcraft and Jeffrey Goeders, “Synchronizing On-Chip Software and Hardware Traces for HLS-Accelerated Programs,” International Conference on Field Programmable Technology (FPT), Dec 2019.

  4. Wesley Stirk and Jeffrey Goeders, “Implementation and Design Space Exploration of a Turbo Decoder in High-Level Synthesis,” International Conference on Reconfigurable Computing and FPGAs (ReConFig), Dec 2019.

  5. Daniel Holanda Noronha, Ruizhe Zhao, Zhiqiang Que, Jeffrey Goeders, Wayne Luk and Steve Wilton, “An Overlay for Rapid FPGA Debug of Machine Learning Applications,” International Conference on Field Programmable Technology (FPT), Dec 2019.

  6. Daniel Holanda Noronha, Ruizhe Zhao, Jeffrey Goeders, Wayne Luk, and Steven J.E. Wilton, “On-chip FPGA Debug Instrumentation for Machine Learning Applications,” International Symposium on Field-Programmable Gate Arrays (FPGA), Feb 2019.

  7. Matthew Ashcraft and Jeffrey Goeders, “Unified On-Chip Software and Hardware Debug for HLS-Accelerated Programs,” International Conference on Field Programmable Technology (FPT), Dec 2018.

  8. Al-Shahna Jamal, Jeffrey Goeders and Steve Wilton, “An FPGA Overlay Architecture Supporting Rapid Implementation of Functional Changes during On-Chip Debug,” International Conference on Field Programmable Logic and Applications (FPL), Aug 2018.

  9. Jeffrey Goeders, Tanner Gaskin, and Brad Hutchings, “Demand Driven Assembly of FPGA Configurations Using Partial Reconfiguration, Ubuntu Linux, and PYNQ,” International Symposium on Field-Programmable Custom Computing Machines (FCCM), May 2018.

  10. Al-Shahna Jamal, Jeffrey Goeders, and Steven J.E. Wilton, “Architecture Exploration for HLS-Oriented FPGA Debug Overlays,” International Symposium on Field-Programmable Gate Arrays (FPGA), Feb 2018.

  11. Pavan Kumar Bussa, Jeffrey Goeders, and Steven JE Wilton, “Accelerating in-system FPGA debug of high-level synthesis circuits using incremental compilation techniques,” International Conference on Field Programmable Logic and Applications (FPL), Sep 2017.

  12. Jeffrey Goeders, “Enabling Long Debug Traces of HLS Circuits Using Bandwidth-Limited Off-Chip Storage Devices,” International Symposium on Field-Programmable Custom Computing Machines (FCCM), May 2017.

  13. Jeffrey Goeders, and Steven J.E. Wilton, “Quantifying observability for in-system debug of high-level synthesis circuits,” International Conference on Field Programmable Logic and Applications (FPL), Aug 2016.

  14. Jeffrey Goeders, and Steven J.E. Wilton, “Using Round-Robin Tracepoints to Debug Multithreaded HLS Circuits on FPGAs,” International Conference on Field Programmable Technology (FPT), Dec 2015.

  15. Jeffrey Goeders, and Steven J.E. Wilton, “Using Dynamic Signal-Tracing to Debug Compiler-Optimized HLS Circuits on FPGAs,” International Symposium on Field-Programmable Custom Computing Machines (FCCM), May 2015.

  16. Jeffrey Goeders, and Steven J.E. Wilton, “Effective FPGA Debug for High-Level Synthesis Generated Circuits,” International Conference on Field Programmable Logic and Applications (FPL), Sep 2014.

  17. Eddie Hung, Jeffrey Goeders, and Steven J.E. Wilton, “Faster FPGA Debug: Efficiently Coupling Trace Instruments with User Circuitry,” International Symposium on Applied Reconfigurable Computing (ARC), Apr 2014.

  18. Jeffrey Goeders, and Steven J.E. Wilton, “VersaPower: Power Estimation for Diverse FPGA Architectures,” International Conference on Field Programmable Technology (FPT), Dec 2012.

  19. Jonathan Rose, Jason Luu, Chi Wai Yu, Opal Densmore, Jeffrey Goeders, Andrew Somerville, Kenneth B. Kent, Peter Jamieson, and Jason Anderson, “The VTR Project: Architecture and CAD for FPGAs from Verilog to Routing,” International Symposium on Field Programmable Gate Arrays (FPGA), Feb 2012.

  20. Jeffrey Goeders, Guy Lemieux, and Steven J.E. Wilton, “Deterministic Timing-Driven Parallel Placement by Simulated Annealing Using Half-Box Window Decomposition,” International Conference on Reconfigurable Computing and FPGAs (ReConFig), Dec 2011.

Peer-Reviewed International Workshop Publications

  1. Adam Hastings, Sean Jensen, Jeffrey Goeders, and Brad Hutchings, “Using Physical and Functional Comparisons to Assure 3rd-Party IP for Modern FPGAs,” International Verification and Security Workshop (IVSW), Jul 2018.

Peer-Reviewed International Oral Presentations

  1. Benjamin James, Michael Wirthlin, and Jeffrey Goeders, “Understanding How Software Properties Impact the Effectiveness of Automated Software Fault Tolerance,” Nuclear and Space Radiation Effects Conference (NSREC), Dec 2020.

  2. Benjamin James, Michael Wirthlin, Heather Quinn, and Jeffrey Goeders, “Applying Compiler-Automated Software Fault Tolerance to Multiple Processor Platforms,” Nuclear and Space Radiation Effects Conference (NSREC), Jul 2019.

Peer-Reviewed International Poster Presentations

  1. Matthew Bohman, Benjamin James, Michael Wirthlin, Heather Quinn, and Jeffrey Goeders, “Microcontroller Compiler-Assisted Software Fault Tolerance,” Nuclear and Space Radiation Effects Conference (NSREC), Jul 2018.